In computer environments, digital memory is used to store data. In some cases, a variety of different processors may have access to the same memory. For example, the different processors may be coupled to a shared memory via a system bus. Only one of the processors is able to access the memory at a given time via the system bus. A bus controller arbitrates the access to the bus and routes traffic accordingly.
In this disclosure, the term “processor” generally refers to any device that can access a memory, e.g., to either store data to the memory or retrieve data from the memory. Examples of processors include general purpose microprocessors, application specific processors such as application specific integrated circuits (ASICs), modulator-demodulators (MODEMs), central processing units, digital signal processors (DSPs), field programmable gate arrays (FPGAs), or any device that can process data from a memory. Accordingly, as used in this disclosure, the term “processor” broadly refers to any device, module or unit that can write data to the memory or retrieve data from the memory.
In order to access the memory, a clock signal is needed. A clock signal is generally a signal that switches with every cycle of a system clock in order to provide synchronization between different units or processors of the system. When data is written from a processor to a memory, the processor typically sends its clock signal to the memory controller, which uses the clock signal to synchronize the memory to the processor as data is written to the memory. When data is retrieved from the memory to a processor, however, clock signal generation can be more challenging.
Some memory devices provide a clock signal from the memory to the processor on an external line. Clock signals sent from a memory on an external line are often referred to as a “strobe.” Unfortunately, memories that generate a strobe are more complex than memories that use the clock signal from the processor when retrieving data from the memory to the processor.
When the clock signal of a processor is used by the memory controller during data retrieval from the memory, delay becomes a paramount concern. In this case, the flight time of an incoming memory access signal, the access time to the memory, and the flight time of data sent from the memory to the memory controller can all add delay, which can undermine the accuracy of the clock signal. If the data is not properly clocked, errors may occur when reading data from memory.
Typically, the memory controller “re-clocks” the data in an attempt to account for the delay introduced by flight time and access time in order to ensure that the data is properly clocked. However, accurate re-clocking of data is difficult, and variations between processors, flight times, external factors (such as temperature variation), and other variables can compound these difficulties.